Method and apparatus for forming a barrier layer on a substrate

ABSTRACT

A first method is provided for forming a barrier layer on a substrate by sputter-depositing a tantalum nitride layer on a substrate having (1) a metal feature formed on the substrate; (2) a dielectric layer formed over the metal feature; and (3) a via formed in the dielectric layer so as to expose the metal feature. The via has side walls and a bottom, and a width of about 0.18 microns or less. The tantalum nitride layer is deposited on the side walls and bottom of the via and on a field region of the dielectric layer; and has a thickness of at least about 200 angstroms on the field region. The first method also includes sputter-depositing a tantalum layer on the substrate, in the same chamber. The tantalum layer having a thickness of less than about 100 angstroms on the field region. Other aspects are provided.

This application is a division of and claims priority from U.S. patentapplication Ser. No. 10/409,406 filed Apr. 7, 2003, which claimspriority from U.S. Provisional Patent Application Ser. No. 60/430,267,filed Dec. 2, 2002 and titled “Method and Apparatus for SputterDeposition”. Each of these applications is hereby incorporated byreference herein in its entirety.

CROSS REFERENCE TO RELATED APPLICATIONS

The present application is related to U.S. Provisional PatentApplication Ser. Nos. 60/380,385 and 60/380,386, both filed on May 14,2002 and titled “Method and Apparatus for Sputter Deposition” (AttorneyDocket Nos. 6221 and 6172). These provisional applications are herebyincorporated by reference herein in their entirety.

FIELD OF THE INVENTION

The present invention is concerned with fabrication of semiconductordevices, and is more particularly concerned with sputtering of materialsonto substrates used to fabricate semiconductor devices.

BACKGROUND OF THE INVENTION

Semiconductor device fabrication typically involves depositing andpatterning a number of layers on a substrate such as a silicon wafer orglass plate. One widely used method of forming material layers onsubstrates is known as sputtering or sputter deposition (also referredto as physical vapor deposition (PVD)).

A first conventional PVD reactor is schematically illustrated incross-section in FIG. 1A. The reactor 10 is of a type sometimes referredto as an SIP (self ionizing plasma) chamber. Reference numeral 10generally indicates the PVD reactor. The reactor 10 includes a sealablechamber 12, and a target 14 installed at the top of the chamber 12. Thetarget 14 is composed of a material, usually a metal, to be sputterdeposited on a wafer 16 held on a pedestal 18. A shield 20 installedwithin the chamber 12 protects walls of the chamber 12 from materialsputtered from the target 14 and provides a grounding anode. A variable(DC) power supply 22 is connected to the target 14 for supplying powerthereto.

A working gas supply 23, which includes a working gas source 24 and afirst mass flow controller 26, supplies a working gas (typically thechemically inactive gas argon) to the chamber 12. If reactive sputteringis to be performed to sputter-deposit a metal nitride layer, such asTaN, a second gas supply 25 may be provided, including a nitrogen gassource 27 and a second mass flow controller 29. The chamber 12 is shownas receiving argon and nitrogen near the top of the chamber 12, but maybe reconfigured to receive argon and nitrogen at other locations, suchas near the bottom of the chamber 12. A pump 28 is provided to pump outthe chamber 12 to a pressure at which sputtering is performed; and an RFpower source 32 is connected to the pedestal 18 through a couplingcapacitor 34 (e.g., for biasing the wafer 16 during sputtering).

A controller 30 is provided to control operation of the reactor 10. Thecontroller 30 is operatively connected to control the DC power supply22, the first mass flow controller 26, the second mass flow controller29, the pump 28, and the RF power supply 32. The controller 30 similarlymay be coupled to control the position and/or temperature of thepedestal 18. For example, the controller 30 may control the distancebetween the pedestal 18 and the target 14, as well as heating and/orcooling of the pedestal 18. To promote efficient sputtering, a magnetron36 may be rotationally mounted above the target 14 to shape the plasma.The magnetron 36 may be of a type which produces an asymmetric magneticfield which extends deep into the chamber 12 (e.g., toward the pedestal18), to enhance the ionization density of the plasma, as disclosed inU.S. Pat. No. 6,183,614. U.S. Pat. No. 6,183,614 is hereby incorporatedby reference herein in its entirety. Typical ionized metal densities mayreach 10¹⁰ to 10¹¹ metal ions/cm³ when such asymmetric magnetic fieldsare employed. In such systems, ionized metal atoms follow the magneticfield lines which extend into the chamber 12, and thus coat the wafer 16with greater directionality and efficiency. The magnetron 36 may rotate,for example, at 60-100 rpm. Stationary magnetic rings may be usedinstead of the rotating magnetron 36.

In operation, argon is admitted into the chamber 12 from the working gassupply 23 and the DC power supply 22 is turned on to ignite the argoninto a plasma. Positive argon ions thereby are generated, and the target14 is biased negatively relative to the grounded shield 20. Thesepositively charged argon ions are attracted to the negatively biasedtarget 14, and may strike the target 14 with sufficient energy to causetarget atoms to be sputtered from the target 14. Some of the sputteredatoms strike the wafer 16 and are deposited thereon thereby forming afilm of the target material on the wafer 16.

A DC self bias of the wafer 16 results from operation of the RF powersupply 32, and enhances efficiency of sputter deposition (e.g., byattracting ionized target atoms which strike the wafer 16 with moredirectionality). As stated, the use of asymmetric magnetic fieldsincreases ionized metal densities. A larger fraction of sputtered targetatoms thereby strike the wafer 16 (with greater directionality).

Within the reactor 10, sputtering typically is performed at a pressureof about 0-2 milliTorr. Other pressures may be employed. The powerapplied to the target 14 may be, for example, about 18 kW and the RFbias signal applied to the pedestal 18 may be about 250 W or less(although other target powers and RF biases may be used).

If reactive sputtering is to be performed, nitrogen is flowed into thechamber 12 from the second gas supply 25 together with argon providedfrom the working gas supply 23. Nitrogen reacts with the target 14 toform a nitrogen film on the target 14 so that metal nitride is sputteredtherefrom. Additionally, non-nitrided atoms are also sputtered from thetarget 14. These atoms can combine with nitrogen to form metal nitridein flight or on the wafer 16.

FIG. 1B is a schematic cross-sectional view of a second conventional PVDreactor 10′. The reactor 10′ of FIG. 1B may have all of the componentsdescribed above in connection with the reactor 10 of FIG. 1A. Inaddition the reactor 10′ includes a coil 38 which is disposed within thechamber 12 and surrounds a portion of the interior volume of the chamber12. The coil 38 may comprise a plurality of coils, a single turn coil, asingle turn material strip, or any other similar configuration. The coil38 is positioned along the inner surface of the chamber 12, between thetarget 14 and the pedestal 18.

An RF power source 40 is connected to the coil 38 and is controlled bythe controller 30. During sputter-deposition operation of the reactor10′, the RF power source 40 is operated to energize the coil 38, toenhance the plasma within the chamber 12 (by ionizing target atomssputtered from the target 14). The coil 38 typically is energized atabout 2 MHz at a power level of 1-3 kW. Other frequencies and/or powersmay be used. As with the reactor 10 of FIG. 1A, metal ion densities canreach about 10¹⁰-10¹¹ metal ions/cm³. However, because of the energyprovided by the coil 38, high metal ion densities may be provided over awider region of the plasma of the reactor 10 than for the plasma of thereactor 10 of FIG. 1A. The chamber pressures employed in the reactor 10′of FIG. 1B may be similar to those described above in connection withthe reactor 10 of FIG. 1A. As was the case with the reactor 10 of FIG.1A, stationary ring magnets may be used in the reactor 10′ of FIG. 1B inplace of the rotating magnetron 36.

FIG. 1C is a schematic cross-sectional view of a third conventional PVDreactor 10″. The reactor 10″ of FIG. 1C may have all the components ofthe reactor 10′ of FIG. 1B, except that in place of the asymmetricmagnetron 36 shown in FIG. 1B, a balanced magnetron 42 (FIG. 1C) may beprovided. The magnetic field provided by the balanced magnetron 42 doesnot extend as far into the chamber 12 as the magnetic field provided bythe asymmetric magnetron 36. The reactor 10″ of FIG. 1C is thereforeoperated at a higher pressure (e.g., 10-100 milliTorr) so that metalatoms sputtered from the target 14 thermalize and have a greateropportunity for ionization. That is, at the higher pressure at which thereactor 10″ operates, metal atoms sputtered from the target 14experience more collisions (have a smaller mean free path betweencollisions) and due to increased collisions have more random motion or alonger transit time within the plasma of the reactor 10″ and thus moreopportunity to ionize. Metal ion densities within the reactor 10″ mayreach about 10¹⁰-10¹¹ metal ions/cm³, but over a larger volume than inthe reactor 10 of FIG. 1A.

As in the case of the reactors 10, 10′, stationary ring magnets may beemployed in the reactor 10″ of FIG. 1C.

FIG. 1D is a schematic cross-sectional view of a fourth conventional PVDreactor 10′″. The reactor 10′″ includes a specially shaped target 242and a magnetron 280. The target 242 or at least its interior surface iscomposed of the material to be sputter deposited (e.g., copper,titanium, tantalum, tungsten or other materials). Reactive sputtering ofmaterials like TiN and TaN can be accomplished by using a Ti or Tatarget and including gaseous nitrogen in the plasma. In such a case, thenitrogen is introduced into the reactor 10′″ from a nitrogen gas sourcewhich is not shown in FIG. 1D. Other combinations of metal targets andreactive gases may be employed.

The target 242 includes an annularly shaped downwardly facing vault 118facing a wafer 120 which is to be sputter coated. The vault couldalternatively be characterized as an annular roof. The vault 118 has anaspect ratio of its depth to radial width of at least 1:2 and preferablyat least 1:1. The vault 118 has an outer sidewall 122 outside of theperiphery of the wafer 120, an inner sidewall 124 overlying the wafer120, and a generally flat vault top wall or roof 244 (which closes thebottom of the downwardly facing vault 118). The target 242 includes acentral portion forming a post 126 including the inner sidewall 124 anda generally planar face 128 in parallel opposition to the wafer 120. Acylindrical central well 136 of the target 242 is formed between opposedportions of the inner target sidewall 124. The target 242 also includesa flange 129 that is vacuum sealed to a grounded chamber body 150 of thereactor 10′″ through a dielectric target isolator 152.

The wafer 120 is clamped to a heater pedestal electrode 154 by, forexample, a clamp ring 156 although electrostatic chucking mayalternatively be employed. An electrically grounded shield 158 acts asan anode with respect to the cathode target 242, which is negativelyenergized by a power supply 160. As an alternative to DC sputtering, RFsputtering can also be employed, and may be particularly useful forsputtering non-metallic targets.

An electrically floating shield 162 is supported on the electricallygrounded shield 158 or chamber 150 by a dielectric shield isolator 164.A cylindrical knob 166 extending downwardly from the outer targetsidewall 122 and positioned inwardly of the uppermost part of thefloating shield 162 protects the upper portion of the floating shield162 and the target isolator 152 from sputter deposition from the strongplasma disposed within the target vault 118. The gap between the upperportion of the floating shield 162 and the target knob 166 and theflange 129 is small enough to act as a dark space (preventing a plasmafrom propagating into the gap).

A working gas such as argon is supplied into the reactor 10′″ from a gassource 168 through a mass flow controller 170. A vacuum pumping system172 maintains the chamber at a reduced pressure, typically a basepressure of about 10⁻⁸ Torr. An RF power supply 174 RF biases thepedestal electrode 154 through an isolation capacitor (not shown), toproduce a negative DC self-bias. Alternatively, the RF power supply maybe omitted and the pedestal electrode 154 may be allowed to float todevelop a negative self-bias. A controller 176 regulates the powersupplies 160, 174, mass flow controller 170, and vacuum system 172(e.g., according to a sputtering recipe stored in the controller 176).The controller 176 also may control the position and/or temperature ofthe pedestal electrode 154.

The magnetron 280 includes inner and outer top magnets 272, 274overlying the vault roof 244. Side magnets 282, 284 disposed outside ofthe vault sidewalls 122, 124 have opposed vertical magnetic polaritiesbut are largely decoupled from the top magnets 272, 274 because they aresupported on a magnetic yoke 188 by non-magnetic supports 286, 288. As aresult, the side magnets 282, 284 create a magnetic field B in the vault118 that has two generally anti-parallel components extending radiallyacross the vault 118 as well as two components extending generallyparallel to the trough sidewalls. Thus the magnetic field B extends overa substantial depth of the vault 118 and repels electrons from thesidewalls 122, 124. A magnetic field B′ is formed by top magnets 272,274.

A motor 190 is supported on the chamber body 150 by means of acylindrical sidewall 192 and a roof 194, which are preferablyelectrically isolated from the biased target flange 129. The motor 190has a motor shaft connected to the yoke 188 at a central axis 116 of thetarget 242. The motor 190 may rotate the magnetron 280 about the axis116 at a suitable rate (e.g., about 50 rpm or greater). The yoke 188 isasymmetric and may be shaped as a sector. Mechanical counterbalancingmay be provided to reduce vibration in the rotation of the axiallyoffset magnetron 280.

Some or all of the magnets of the magnetron 280 may be replaced bystationary ring magnets.

The pressure level employed during sputtering in the reactor 10′″ ofFIG. 1D may be similar to the pressure level employed during sputteringin the reactor 10 of FIG. 1A. The reactor 10′″ of FIG. 1D producesionized metal densities in the range of 10¹⁰-10¹¹ metal ions/cm³ withoutrequiring a coil and over a larger volume than in the reactor 10 of FIG.1A. Target power may be in the range of about 20-40 kW although otherpower ranges may be employed.

A reactor of the type shown in FIG. 1D is disclosed in U.S. Pat. No.6,277,249, which is hereby incorporated by reference herein in itsentirety. U.S. Pat. No. 6,251,242 is related to U.S. Pat. No. 6,277,249and is also incorporated by reference herein in its entirety.

The multi-layer structure of typical semiconductor devices requires thatconnections be made between layers of the devices. For this purpose,holes or other features are formed in dielectric layers that isolateadjacent conductive layers from each other, and the holes are filledwith conductive material (e.g., metal). If a lower layer to which aconnection is made is the semiconductor substrate, then a connectinghole is referred to as a “contact”; if the lower layer is ametallization layer then the connecting hole is referred to as a “via”.As used herein, the term “via” should be understood to include bothcontact holes and via holes, as well as other similar features such aslines and/or trenches.

With the use of copper for metallization layers in semiconductordevices, it has become conventional to coat vias with barrier layersbefore filling with copper. The purpose of the barrier layer is toprevent diffusion of the copper into the dielectric layer through whichthe via or other feature is formed.

FIG. 2 is a schematic cross-sectional view of a dual damascene structure300 which has been coated with a barrier layer 302 in accordance withconventional practice. It should be understood that FIG. 2 is not drawnto scale and is merely representative. The dual damascene structure 300has been formed in a dielectric layer 304, and includes a trench 306 andvias 308. The vias 308 have bottoms 310 and side walls 312.

In accordance with conventional practice, the barrier layer 302 may beformed by sputter-depositing a tantalum nitride layer 314, followed bysputter-depositing a tantalum layer 316. According to this conventionalpractice, the tantalum nitride layer 314 generally is deposited so as tohave a thickness of about 100 angstroms at a field region 318 of thesubstrate. The tantalum layer 316 generally is deposited so as to have athickness of about 150 angstroms at the field region 318.

A problem which is encountered with the conventional barrier layer 302of FIG. 2 is asymmetry in the barrier layer, particularly at the lowerportion of the via side wall 312 (near bottom 310), as indicated byreference numeral 320. Such asymmetry may result in inadequate side wallcoverage and less than desirable performance of the barrier layer 302.

SUMMARY OF THE INVENTION

In a first aspect of the invention, a first method is provided forforming a barrier layer on a substrate. The first method includes thestep of sputter-depositing a tantalum nitride layer on a substratehaving (1) a metal feature formed on the substrate; (2) a dielectriclayer formed over the metal feature; and (3) a via formed in thedielectric layer so as to expose the metal feature. The via has sidewalls and a bottom, and a width of about 0.18 microns or less. Thetantalum nitride layer is deposited on the side walls and bottom of thevia and on a field region of the dielectric layer; and has a thicknessof at least about 200 angstroms on the field region of the dielectriclayer upon completion of the sputter-depositing of the tantalum nitridelayer.

The first method also includes the step of sputter-depositing a tantalumlayer on the substrate, in the same chamber used to sputter deposit thetantalum nitride layer. The tantalum layer having a thickness of lessthan about 100 angstroms on the field region of the dielectric layerupon completion of the sputter-depositing of the tantalum layer.

In a second aspect of the invention, a second inventive method isprovided for forming a barrier layer on a substrate. The secondinventive method is similar to the first inventive method, but includesthe step of back sputtering at least a portion of the tantalum nitridelayer from the bottom of the via of the substrate prior to the step ofsputter-depositing the tantalum layer. Numerous other aspects areprovided, as are systems and apparatus in accordance with these andother aspects of the invention.

The inventive methods and apparatus provided herein reflect arecognition on the part of the present inventors that the problem ofside wall asymmetry in a conventional barrier layer formed from atantalum nitride layer and a tantalum layer is largely due to asymmetryin the tantalum layer. Consequently, in one or more aspects of thepresent invention, the thickness of the tantalum layer is reduced, whileincreasing the thickness of the tantalum nitride layer. Prior artpractices have called for a tantalum nitride layer having a thickness ofabout 100 angstroms and a tantalum layer having a thickness of at least100 angstroms on the field region of a substrate. By contrast, aspectsthe invention provide for a tantalum nitride layer of about 200angstroms or greater and a tantalum layer of less than about 100angstroms on the field region of the substrate. In at least oneembodiment of the invention, the thickness of the tantalum layer isabout 30-50 angstroms on the field region of the substrate. Numerousother aspects are provided.

Other features and aspects of the present invention will become morefully apparent from the following detailed description, the appendedclaims and the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1A is a schematic cross-sectional view of a first conventionalplasma sputtering reactor;

FIG. 1B is a schematic cross-sectional view of a second conventionalplasma sputtering reactor;

FIG. 1C is a schematic cross-sectional view of a third conventionalplasma sputtering reactor;

FIG. 1D is a schematic cross-sectional view of a fourth conventionalplasma sputtering reactor;

FIG. 2 is a schematic cross-sectional view of a dual damascene structurethat has been coated with a barrier layer in accordance with aconventional process;

FIG. 3 is a flow chart that illustrates a method of forming a barrierlayer on a substrate in accordance with the present invention;

FIGS. 4A-4C are schematic cross-sectional views of a dual damascenestructure at various stages of the inventive process of FIG. 3;

FIG. 4D is a view similar to FIGS. 4A-4C showing the dual damascenestructure after copper-filling subsequent to the process of FIG. 3; and

FIGS. 5A-5D are schematic cross-sectional views of a dual damascenestructure at various stages of an alternate inventive barrier layerprocess.

DETAILED DESCRIPTION

In accordance with one or more aspects the invention, a barrier layer isformed in a via that has been formed in a dielectric layer on asubstrate. The barrier layer may be formed, for example, employing athree-step process. In the first step, a tantalum nitride layer issputter-deposited on a bottom, side walls and field region of the via.In the second step, the tantalum nitride layer is back sputtered fromthe bottom of the via to reduce or eliminate the bottom tantalum nitridelayer, and to improve side wall coverage. In the third step, a brief or“flash” sputter-deposition of tantalum is performed to provide suitablewetting for subsequent copper seed layer deposition. Other aspects areprovided.

FIG. 3 is a flow chart that illustrates an exemplary process performedin accordance with the present invention. The process of FIG. 3 may beperformed, for example, in a sputtering reactor of the type illustratedin FIG. 1B.

The process of FIG. 3 begins with a step 330, at which a tantalumnitride layer is sputter-deposited by a reactive sputtering process.That is, referring to FIG. 1B, the target 14 (a tantalum target) isenergized by means of the DC power supply 22. Argon is flowed to thechamber 12 via the mass flow controller 26, and nitrogen is flowed tothe chamber 12 via the mass flow controller 29. In one embodiment of theinvention, the chamber pressure may be about 10 mTorr or less, and morepreferably in the range of about 2-4 mTorr. Other pressures may beemployed. If the reactor 10′ is adapted to process 200 millimetersubstrates, the power signal supplied to the target 14 by the DC powersupply 22 may be about 20 kW (or less), and a bias signal in the range0-150 W may be supplied to the pedestal 18 by the RF power supply 32. Ifthe reactor 10′ is adapted to process 300 millimeter substrates, thetarget power may be about 40 kW (or less) and the bias power may be inthe range of about 0-300 W. Other power ranges may be employed. In atleast one embodiment of the invention, the coil 38 is not energizedduring step 330.

The energized target 14 ignites the gases in the chamber 12 to form aplasma so that tantalum nitride is reactively sputter-deposited on thesubstrate 16. In one particular embodiment, step 330 may have a durationin the range of about 7-10 seconds (although other durations may beemployed).

FIG. 4A is a schematic cross-sectional view showing a dual damascenestructure 300′ upon completion of step 330. Reference numeral 400indicates a tantalum nitride layer deposited during step 330. FIG. 4Ashows the same dielectric layer 304, trench 306, vias 308, via bottoms310, via side walls 312 and field region 318 as were referred to inconnection with FIG. 2. Like FIG. 2 (and also FIGS. 4B-4D), FIG. 4A isnot drawn to scale. In one or more embodiments of the invention, uponcompletion of step 330, the tantalum nitride layer 400 may have athickness on the field region 318 of greater than about 200 angstroms,and preferably about 220 angstroms. Thicknesses in the range of about100-400 angstroms may also be employed.

Referring again to FIG. 3, step 330 is followed by step 332. At step 332the tantalum layer 400 is at least partially back sputtered from the viabottoms 310. In one embodiment of the invention, substantially all ofthe tantalum nitride layer 400 is back sputtered from the via bottoms310. In step 332, argon is flowed to the chamber 12 via the mass flowcontroller 26, but nitrogen is not flowed to the chamber 12. In one ormore embodiments of the invention, the pressure in the chamber 12 maybe, for example, less than about 10 mTorr and more preferably in therange of about 1-3 mTorr. A bias signal is supplied to the pedestal 18by the RF power supply 32. If the reactor 10′ is adapted to process 200millimeter wafers, the bias signal may be, for example, in the range ofabout 200-500 W, and in one embodiment may be about 300 W. If thereactor 10′ is adapted to process 300 millimeter substrates, the biassignal may be, for example, in the range of about 400-1000 W. Inaddition, the coil 38 may be energized by the RF power source 40 (e.g.,at about 2 MHz), for example, at a power level in the range of about1000-3000 W. In addition, the target 14 may be energized with a powerlevel in the range of about 0-1000 W. A plasma which is ignited in thechamber 12 causes back sputtering of the tantalum nitride layer 400 fromthe via bottom walls 310. Depending on the power levels employed, theduration of the back sputtering step 332 may be in the range of about5-15 seconds. Other chamber pressures, pedestal biases, coil powers,target powers and/or back sputter durations may be employed.

FIG. 4B is a view similar to FIG. 4A, showing the condition of the dualdamascene structure 300′ upon completion of step 332. As shown in FIG.4B, the via bottoms 310 may be substantially free of the tantalumnitride layer 400 upon completion of step 332. In addition,coverage/uniformity of the via side walls 312 with tantalum nitride maybe improved. In one embodiment, the thickness of the tantalum nitridelayer 400 at the field region 318 may be reduced from about 220angstroms to about 200 angstroms upon completion of step 332. Moregenerally, the back sputtering step may (1) substantially eliminate thetantalum nitride layer on the bottoms 310 of the vias 308 (therebyimproving the contact resistance of any interconnect formed therein);(2) increase the thickness and/or uniformity of the tantalum nitridelayer on the side walls 312 of the vias 308 (thereby improving thediffusion resistance of the tantalum nitride barrier layer); and/or (3)only slightly thin the tantalum nitride layer on the field region 318(thereby maintaining adequate diffusion resistance for the dielectriclayer 304).

Referring again to FIG. 3, step 334 follows step 332. At step 334 abrief (so-called “flash”) sputter-deposition of a tantalum layer isperformed. During step 334, argon is flowed to the chamber 12 via themass flow controller 26, but nitrogen is not flowed to the chamber 12.The pressure in the chamber 12 during step 334 may be, for example, lessthan about 10 mTorr and more preferably in the range of about 1-3 mTorr.The coil 38 need not be energized during step 334, and the target andbias power levels may be similar to those described in connection withstep 330. The duration of step 334 may be less than about two seconds,and, in one embodiment, may be in the range of about 1-1.5 seconds.Thus, during step 334, the target 14 is energized and a plasma isignited in the chamber 12 to perform sputter-deposition of a tantalumlayer on the dual damascene structure 300′. Other chamber pressures,pedestal biases, coil powers, target powers and/or durations may beemployed.

FIG. 4C illustrates the dual damascene structure 300′ upon completion ofstep 334. Reference numeral 402 indicates the tantalum layer depositedduring step 334. It should again be noted that FIG. 4C is not drawn toscale. In one particular embodiment of the invention, the tantalum layer402 may have, upon completion of step 334, a thickness in the range ofabout 30-50 angstroms on the field region 318. The thickness of thetantalum layer 402 on the via bottom walls 310 may be in the range ofabout 20-40 angstroms. The side-wall coverage may be about 10 angstroms.Other thicknesses may be employed. Also the target power during step 334may be less than indicated above (e.g., the target power may be about 5kW or less) in which case the step 334 may have a longer duration.

It will be appreciated that the controller 30 (FIG. 1B) may beprogrammed to perform one or more of the steps of the process of FIG. 3within the reactor 10′.

While the present invention has been described as applied in a plasmasputtering reactor of the type illustrated in FIG. 1B, it will beunderstood that the present invention may be applied in other types ofplasma sputtering reactors, including those illustrated in FIGS. 1A, 1Cand 1D. However, the reactor of FIG. 1B is believed to be particularlyadvantageous in view of the back sputtering efficiency promoted byenergizing the coil 38.

FIG. 4D is a view similar to FIG. 4A, showing the dual damascenestructure 300′ upon completion of copper fill and planarizationprocesses that may be performed after the process of FIG. 3. Inaccordance with conventional practices, the filling of the dualdamascene structure 300′ with copper may include sputter-deposition of acopper seed layer on the substrate 403 (e.g., in a different reactorthan that employed for tantalum nitride and tantalum deposition),followed by copper electrochemical deposition (e.g., electrochemicalplating). In FIG. 4D, reference numeral 404 indicates the copper fill ofthe dual damascene structure 300′ after formation of a barrier layerthat includes the tantalum nitride layer 400 and the tantalum layer 402.

The present invention also may provide a fourth step for the process ofFIG. 3, in which back sputtering is performed with respect to thetantalum layer 402 (e.g., to further reduce interconnect resistance).However, it may be advantageous to omit back sputtering of the tantalumlayer, so that there is adequate wetting of the via bottoms 310.

The thicknesses of the tantalum nitride layer 400 and the tantalum layer402 on the field region 318 as described (e.g., about 200 angstroms oftantalum nitride after back sputtering and about 30-50 angstroms oftantalum) may be suitable in conjunction with a 0.13 micron generationof semiconductor devices, in which a typical via width may be about 0.18microns, and a typical aspect ratio of a via may be in the range ofabout 4:1 to 6:1. In general however, the thickness of the tantalumnitride layer on the field region, either before or after backsputtering, may be in the range of about 100-400 angstroms, and thethickness of the tantalum layer on the field region may be any thicknessless than about 100 angstroms. It is also contemplated to employ thetantalum nitride and tantalum layer thicknesses according to the presentinvention in connection with via widths that are less than 0.18 microns.

The inventive methods and apparatus disclosed herein provide forsatisfactory barrier layer side wall coverage with reduced asymmetry,together with suitable wetting for subsequent deposition of a copperseed layer.

The foregoing description discloses only exemplary embodiments of theinvention; modifications of the above-disclosed apparatus and methodswhich fall within the scope of the invention will be readily apparent tothose or ordinary skill in the art.

For instance, one or more of the steps of the process of FIG. 3 may beimplemented in computer program code as one or more computer programproducts. Each inventive computer program product may be carried by amedium readable by a computer (e.g., a carrier wave signal, a floppydisk, a hard drive, a random access memory, etc.). Such computer programcode and/or computer program products may be executed, for example, byone or more of the controllers 30, 176 of FIGS. 1A-1D.

It may be desirable to control (via the controllers 30, 176 of FIGS.1A-1D) the temperature of a substrate during back sputtering (e.g., toprevent excessive heating during back sputtering). This may be achieved,for example, via control of a resistive heating element (not shown)and/or a liquid cooling system (not shown) associated with the pedestal18, 154.

It is contemplated to modify the process of FIG. 3 by omitting the backsputtering step 332 performed between the sputter-deposition steps 330,334 and instead back sputtering one or both of the tantalum layer 402and the tantalum nitride layer 400 after the sputter-deposition of thetantalum layer 402 at step 334.

As another alternative for modifying the process of FIG. 3, a step ofsputter-depositing an initial tantalum layer (e.g., with a field regionthickness of 100 angstroms or more) is performed after step 330 andbefore step 332. At step 332, substantially all of the resultingtantalum and tantalum nitride layers may be removed from the viabottoms. Step 334 is then performed as described above.

For example, FIGS. 5A-5D are cross-sectional views of a dual damascenestructure 300″ at various stages of such an alternate process. Forclarity purposes, no asymmetry in layer thickness is shown in FIGS.5A-5D.

With reference to FIG. 5A and FIG. 3, a tantalum nitride layer 500 isdeposited on the bottoms 310 and side walls 312 of the vias 308 (Step330, FIG. 3). An initial tantalum layer 501 (FIG. 5B) then is depositedover the tantalum nitride layer 500 (step not shown in FIG. 3).Thereafter, both the tantalum layer 501 and the tantalum nitride layer500 are back sputtered from the bottoms 310 of the vias 308 (therebyimproving barrier layer coverage on the side walls 312), as shown inFIG. 5C (and/or Step 332 of FIG. 3). A thin tantalum flash layer 502then may be formed over the bottom and/or side walls of the vias 308(FIG. 5D and/or Step 334 in FIG. 3). The dual damascene structure 300″then may be filled and/or planarized as previously described (e.g., viause of a copper seed layer and/or electrochemical deposition).

In at least one embodiment of the invention, when the inventivealternative process described above is employed with vias having widthsof about 0.18 microns or less, the tantalum nitride layer 500 may have athickness of about 50-100 angstroms on the field region 318 of thedielectric layer 304, a thickness of about 10-20 angstroms on the sidewalls 312 of the vias 308 and a thickness of about 10-70 angstroms onthe bottoms 310 of the vias 308. The initial tantalum layer 501 may havea thickness of about 100-300 angstroms on the field region 318 of thedielectric layer 304, a thickness of about 20-40 angstroms on the sidewalls 312 of the vias 308 and a thickness of about 30-180 angstroms onthe bottoms 310 of the vias 308. Following back sputtering of thetantalum nitride and tantalum layers 500, 501, the total barrier layerthickness on the side walls 312 may be about 50 Å or more (and mayinclude a tantalum nitride/tantalum/tantalum nitride stack). Thetantalum flash layer 502 may add a thickness of about 50-100 angstroms(of tantalum) on the field region 318, a thickness of about 5-15angstroms on the side walls 312 and a thickness of about 15-50 angstromson the bottoms 310. Note that the tantalum flash layer 502 is optional,and if employed, may result in side walls 312 having barrier layers oftantalum nitride/tantalum/tantalum nitride/tantalum. Other thicknessesmay be employed for the tantalum and tantalum nitride layers.

When back sputtering the tantalum nitride and/or tantalum layers inaccordance with the present invention, it may be preferable to maintaina significant neutral metal density (e.g., by sputtering target atomsduring back sputtering) and ion density (e.g., by applying power to anRF coil or by employing any other known means for increasing iondensity) during back sputtering. Maintaining a significant neutral metaldensity during back sputtering may reduce and/or prevent over etching ofbevel regions 506 (FIGS. 4A and 5A) of the dual damascene structure 300″through deposition of new tantalum and/or tantalum nitride on bevelsurfaces during back sputtering. Neutral metal atoms may not, ingeneral, reach the bottoms 310 of the vias 308. A significant iondensity (whether metal or argon) will aid in back sputtering of materialfrom the bottoms 310 of the vias 308 by increasing the directionality ofthe back sputter process.

While the present invention has been described primarily with referenceto dual damascene structures, it will be understood that the inventionmay be applied to other interconnect configurations such as single ortriple damascene structures.

As used herein, a high density plasma physical vapor deposition (HDPPVD)chamber may include any PVD chamber capable of sustaining a plasmahaving an ion density of at least 10¹⁰ ions/cm³ in a bulk region of theplasma (e.g., a region, between a target/cathode and substrate supportpedestal, that is not immediately adjacent the target/cathode; althoughan area immediately adjacent the target/cathode also may have an iondensity of at least 10¹⁰ ions/cm³).

Accordingly, while the present invention has been disclosed inconnection with exemplary embodiments thereof, it should be understoodthat other embodiments may fall within the spirit and scope of theinvention, as defined by the following claims.

1. A plasma sputtering reactor, comprising: a sealable chamber; apedestal adapted to support a substrate within the chamber; a tantalumsputtering target in opposition to the pedestal; and a controlleradapted to control the reactor to: sputter-deposit a tantalum nitridelayer on a substrate having: a metal feature formed on the substrate; adielectric layer formed over the metal feature; and a via formed in thedielectric layer so as to expose the metal feature, the via having sidewalls and a bottom, and a width of about 0.18 microns or less; whereinthe tantalum nitride layer is deposited on the side walls and bottom ofthe via and on a field region of the dielectric layer; and wherein thetantalum nitride layer has a thickness of at least about 200 angstromson the field region of the dielectric layer upon completion of thesputter-depositing of the tantalum nitride layer; and sputter-deposit atantalum layer on the substrate, the tantalum layer having a thicknessof less than about 100 angstroms on the field region of the dielectriclayer upon completion of the sputter-depositing of the tantalum layer.2. The reactor of claim 1, wherein the tantalum layer has a thickness ofless than about 80 angstroms on the field region of the dielectric layerupon completion of the sputter-deposition of the tantalum layer.
 3. Thereactor of claim 2, wherein the tantalum layer has a thickness of about30-50 angstroms on the field region of the dielectric layer uponcompletion of the sputter-deposition of the tantalum layer.
 4. Thereactor of claim 3, wherein the controller controls the reactor to backsputter at least a portion of the tantalum nitride layer from the bottomof the via of the substrate prior to the sputter-deposition of thetantalum layer.
 5. The reactor of claim 4, further comprising a coildisposed within the chamber and surrounding a portion of an interiorvolume of the chamber, the controller adapted to energize the coilduring at least a portion of the back sputtering of the tantalum nitridelayer.
 6. A plasma sputtering reactor, comprising: a sealable chamber; apedestal adapted to support a substrate within the chamber; a tantalumsputtering target in opposition to the pedestal; and a controlleradapted to control the reactor to: sputter-deposit a tantalum nitridelayer on a substrate having: a metal feature formed on the substrate; adielectric layer formed over the metal feature; and a via formed in thedielectric layer so as to expose the metal feature, the via having sidewalls and a bottom, and a width of about 0.18 microns or less; whereinthe tantalum nitride layer is deposited on the side walls and bottom ofthe via and on a field region of the dielectric layer; and wherein thetantalum nitride layer has a thickness of at least about 200 angstromson the field region of the dielectric layer upon completion of thesputter-depositing of the tantalum nitride layer; and back sputter atleast a portion of the tantalum nitride layer from the bottom of the viaof the substrate; and after the back sputter step, sputter-deposit atantalum layer on the substrate, the tantalum layer having a thicknessof less than about 100 angstroms on the field region of the dielectriclayer upon completion of the sputter-depositing of the tantalum layer.7. The reactor of claim 6, wherein the tantalum layer has a thickness ofless than about 80 angstroms on the field region of the dielectric layerupon completion of the sputter-deposition of the tantalum layer.
 8. Thereactor of claim 7, wherein the tantalum layer has a thickness of about30-50 angstroms on the field region of the dielectric layer uponcompletion of the sputter-deposition of the tantalum layer.
 9. Thereactor of claim 6, wherein the controller controls the reactor to:sputter-deposit an initial tantalum layer on the substrate prior to theback sputtering of the tantalum nitride layer; and back sputter at leasta portion of the initial tantalum layer sputter-deposited prior to theback sputtering of the tantalum nitride layer.
 10. The reactor of claim6, wherein the back sputtering of the tantalum nitride layer isperformed so as to remove substantially all of the tantalum nitridelayer from the bottom of the via.
 11. A high density plasma physicalvapor deposition (HDPPVD) chamber, comprising: a sealable chamber; apedestal adapted to support a substrate within the chamber; a tantalumsputtering target in opposition to the pedestal; and a controlleradapted to control the reactor to: sputter deposit a tantalum nitridelayer on the substrate having: a metal feature formed on the substrate;a dielectric layer formed over the metal feature; and a via formed inthe dielectric layer so as to expose the metal feature, the via havingside walls and a bottom, and a width of about 0.18 microns or less;wherein the tantalum nitride layer is deposited on the side walls andbottom of the via and on a field region of the dielectric layer; whereinthe tantalum nitride layer has a thickness of at least about 200angstroms on the field region of the dielectric layer upon completion ofthe sputter-depositing of the tantalum nitride layer; and wherein thesputter depositing of the tantalum nitride layer is performed within theHDPPVD chamber employing a plasma having an ion density of at least 10¹⁰ions/cm³, at a pressure of not more than about 10 mTorr using a targetpower of not more than about 40 kW and a pedestal bias power of not morethan about 300 W; back sputter at least a portion of the tantalumnitride layer from a bottom of the via of the substrate within theHDPPVD chamber at a pressure of not more than about 10 mTorr using atarget power of not more than about 1000 W, and a pedestal bias power ofnot more than about 1000 W; and sputter-deposit a tantalum layer on thesubstrate at a pressure of not more than about 10 mTorr using a targetpower of not more than about 40 kW and a pedestal bias power of not morethan about 300 W.
 12. The HDPPVD chamber of claim 11 further comprisinga coil disposed within the chamber and surrounding a portion of aninterior volume of the chamber, the controller adapted to energize thecoil during at least a portion of the back sputtering of the tantalumnitride layer, wherein the controller is adapted to apply a coil powerof about 1000-3000 W to the coil during the back sputter of the tantalumnitride layer.